FIELD EFFECT TRANSISTOR
Invention of Field Effect Transistor is the starting point of electronic journey towards digital....
FET is a three terminal device and unipolar because current conduction is only by one carrier either electron or hole.
In FET current is controlled by electric field. Hence we can say this as field-dependent device.
FET is classified into two types
1. Junction FET (JFET)
2. Metal Oxide Semiconductor FET (MOSFET)
2a) Depletion type MOSFET (D-MOSFET)
2b) Enhancement type MOSFET (E-MOSFET)
1. Junction FET (JFET)
FET has three terminals namely Drain, Source and Gate.
N-channel JFET: It consists of N-type semiconductor with two heavily doped P-type regions. Current is produced by electrons in it.
P-channel JFET: It consists of P-type semiconductor with two heavily doped N-type regions. Current is produced by holes in it.
Construction:
Usually the P-type and N-type region combined together to form PN junction for both N & P channels.
In N-channel heavily doped P-type regions at both sides are internally connected and an ohmic contact is brought out called as GATE.
Also two ohmic contacts are brought out at other opposite sides (from N-channel) called as Source and Drain.
In the similar way P-channel JFET also constructed but replacing N-type by P-type and P-type by N-type.
In N-channel heavily doped P-type regions at both sides are internally connected and an ohmic contact is brought out called as GATE.
Also two ohmic contacts are brought out at other opposite sides (from N-channel) called as Source and Drain.
In the similar way P-channel JFET also constructed but replacing N-type by P-type and P-type by N-type.
Operation of JFET:
The current conduction in JFET is from Source to Drain. That current is named as Drain current.
There are two terminal voltages one is between drain & source (Vdd) and the other is between gate & source (Vgg).
In Gate-source terminals, Negative terminal of battery is connected to gate and positive to source. Similarly in Drain-source terminals, Positive terminal is connected to drain and negative to source.
When DC voltages are applied to the terminals of JFET, a depletion region is formed between two PN junctions.
If Gate-source voltage is the only voltage then the width of depletion region is uniform.
If another voltage (Drain-Source voltage) is applied the depletion region extends towards drain under the influence of +ve voltage.
If Gate-Source voltage is not applied, the electrons near source move towards drain (because of -ve voltage) and electrons near drain move towards +ve terminal. This forms a closed loop for current flow. This current is called as drain current.
After applying Gate-Source voltage the depletion region produces this reduces the width of the channel i.e. the channel become narrow.
Hence eventual decrease in current flow because of reduced electron flow towards drain. It's observed from this that if Gate-Source voltage is increased drain current decreases.
If Gate-Source voltage is continuously increased, after a certain stage it will reach high voltage called as Pinch-off voltage.
Under pinch-off voltage there will be no electrons to cross the channel (current is zero). But in practical case small current will flow.
If Gate-Source voltage is further increased beyond pinch-off voltage then the P-N junction breaks down. And the drain current shoots up to large value.
This is the basic principle of operation of JFET.
There are two terminal voltages one is between drain & source (Vdd) and the other is between gate & source (Vgg).
In Gate-source terminals, Negative terminal of battery is connected to gate and positive to source. Similarly in Drain-source terminals, Positive terminal is connected to drain and negative to source.
When DC voltages are applied to the terminals of JFET, a depletion region is formed between two PN junctions.
If Gate-source voltage is the only voltage then the width of depletion region is uniform.
If another voltage (Drain-Source voltage) is applied the depletion region extends towards drain under the influence of +ve voltage.
If Gate-Source voltage is not applied, the electrons near source move towards drain (because of -ve voltage) and electrons near drain move towards +ve terminal. This forms a closed loop for current flow. This current is called as drain current.
After applying Gate-Source voltage the depletion region produces this reduces the width of the channel i.e. the channel become narrow.
Hence eventual decrease in current flow because of reduced electron flow towards drain. It's observed from this that if Gate-Source voltage is increased drain current decreases.
If Gate-Source voltage is continuously increased, after a certain stage it will reach high voltage called as Pinch-off voltage.
Under pinch-off voltage there will be no electrons to cross the channel (current is zero). But in practical case small current will flow.
If Gate-Source voltage is further increased beyond pinch-off voltage then the P-N junction breaks down. And the drain current shoots up to large value.
This is the basic principle of operation of JFET.
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